Simultaneous multithreading: Maximizing on-chip parallelism
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Summary
It is shown that simultaneous multithreading is an attractive alternative to single-chip multiprocessors; simultaneous multithreaded processors with a variety of organizations outperform corresponding conventional multiprocessors with similar execution resources.
- Type
- article
- Published
- 1995-05-01
- Cited by
- 1,777
- References
- 36
- Access
- Open access
- OpenAlex
- https://openalex.org/W2120230074
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:37853
Keywords
Multithreading, Computer science, Simultaneous multithreading, Programming language, Thread (computing)
References
- Architecture And Applications Of The HEP Multiprocessor Computer System
- The Concurrent Execution of Multiple Instruction Streams on Superscalar Processors
- APRIL: a processor architecture for multiprocessing
- The Expandable Split Window Paradigm for Exploiting Fine-grain Parallelism
- Analysis of multithreaded architectures for parallel computing
- Performance estimation of multistreamed, superscalar processors
- Can Dataflow Subsume Von Neumann Computing?
- Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism
- The effectiveness of multiple hardware contexts
- Comparative evaluation of latency reducing and tolerating techniques
- High-bandwidth data memory systems for superscalar processors
- The synergistic effect of thread scheduling and caching in multithreaded computers
- The multiscalar architecture
- Single instruction stream parallelism is greater than two
- Limits of instruction-level parallelism
- MASA: a multithreaded processor architecture for parallel symbolic computing
- Limits of Control Flow on Parallelism
- New CPU benchmark suites from SPEC
- An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
- Exploring The Benefits Of Multiple Hardware Contexts In A Multiprocessor Architecture: Preliminary Results
Cited by
- Speculative Thread Execution in a Multithreaded Dataflow Architecture
- Multiprogramming Performance of the Pentium 4 with Hyper-Threading
- Embedded Software for SoC
- Quantitative study of data caches on a multistreamed architecture
- Trace processors: exploiting hierarchy and speculation
- Simultaneous multithreading fault tolerance processor
- Deep Jam: Conversion of Coarse-Grain Parallelism to Fine-Grain and Vector Parallelism
- Redundant multithreading architecture overview
- Broadcast mechanism for improving conditional branch prediction in speculative multithreaded processors
- Latency- and error-tolerant redundant execution
- Synergistic caching in single-chip multiprocessors
- A Simulator for a Multithreaded Processor
- Exploiting thread-level parallelism on simultaneous multithreaded processors
- The KIT COSMOS Processor: Introducing CONDOR
- Using OpenMP: Portable Shared Memory Parallel Programming (Scientific and Engineering Computation)
- Characterizing the Sort Operation on Multithreaded Architectures
- Speculative Precomputation on Chip Multiprocessors
- A Multi-Core Approach to Addressing the Energy-Complexity Problem in Microprocessors
- PL/PS: A Non-Blocking Multithreaded Architecture With Decoupled Memory And Pipelines
- Dynamic Cache Partitioning for Simultaneous Multithreading Systems
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