A Multi-Core Approach to Addressing the Energy-Complexity Problem in Microprocessors
Explore this paper's citation graph
Summary
Single-ISA heterogeneous multicore architectures as a mechanism to reduce processor power dissipation are proposed and initial results show a more than three-fold reduction in energy at a cost of only 18% performance.
- Type
- article
- Published
- 2003-01-01
- Cited by
- 35
- References
- 27
- OpenAlex
- https://openalex.org/W58922746
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:5358859
Keywords
Multi-core processor, Computer science, Energy consumption, Core (optical fiber), Embedded system
References
- Fellowship - Simulation And Modeling Of A Simultaneous Multithreading Processor
- Time Varying Behavior of Programs
- Reducing Power Consumption of the Issue Logic
- Comparing algorithm for dynamic speed-setting of a low-power CPU
- The simulation and evaluation of dynamic voltage scaling algorithms
- Power aware microarchitecture resource scaling
- Simultaneous multithreading: Maximizing on-chip parallelism
- Limits of instruction-level parallelism
- An area model for on-chip memories and its application
- CACTI: an enhanced cache access and cycle time model
- Automatically characterizing large scale program behavior
- The HP PA-8000 RISC CPU
- Confidence estimation for speculation control
- Selective cache ways: on-demand cache resource allocation
- Pipeline gating: speculation control for energy reduction
- Using IPC Variation in Workloads with Externally Specified R ates to Reduce Power Consumption
- Selective cache ways: on-demand cache resource allocation
- Cacti 3. 0: an integrated cache timing, power, and area model
- Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
- Trends in high-performance microprocessor design
Cited by
- Holistic design for multi-core architectures
- Cpu scheduling for power/energy management on heterogeneous multicore processors
- Reducing Query Latencies in Web Search Using Fine-Grained Parallelism
- Scheduling for heterogeneous processors in server systems
- A Simulation Times Model of Multi-core Simulation
- Energy Management for Commercial Servers
- Characterizing the impact of different memory-intensity levels
- Multicore Challenge in Pervasive Computing Education
- Heterogeneous Multi-core Design for Information Retrieval Efficiency on the Vector Space Model
- The Design of a Cycle Accurate Multi-core Architecture Performance Simulator
- A HW/SW Co-design of Execution Migration for Shared-ISA Heterogeneous Chip Multiprocessors
- Scheduling processor voltage and frequency in server and cluster systems
- Hardware Assistant Scheduling for Synergistic Core Tasks on Embedded Heterogeneous Multi-core System ?
- Traffic analysis of multi-core body sensor networks based on Wireless NoC infrastructure
- Dynamic power management techniques in multi-core architectures: A survey study
- The skewed distribution of working sets : leveraging randomness for cache design (ההתפלגות המוטה של זיכרון עבודה.)
- Energy Management for Commercial
- Performance comparison of LTE eNodeB OSI layer 2 implementations : preemptive partitioned scheduling vs. non-preemptive global scheduling
- Networks-on-Chips: Modeling, Analysis, and Design Methodologies
- How Green IS Your Cloud? - A 64-b ARM-based Heterogeneous Computing Platform with NoC Interconnect for Server-on-chip Energy-efficient Cloud Computing