Models and reconfiguration problems for multi task hyperreconfigurable architectures
Explore this paper's citation graph
- Type
- article
- Published
- 2004-04-26
- Cited by
- 5
- References
- 18
- Access
- Open access
- OpenAlex
- https://openalex.org/W2099812852
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:8740087
Keywords
Control reconfiguration, Computer science, Task (project management), Computer architecture, Distributed computing
References
- Compile-time Optimization of Dynamic Hardware Reconfigurations
- Routing on switch matrix multi-FPGA systems
- Incremental reconfiguration of multi-FPGA systems
- Configuration compression for FPGA-based embedded systems
- Hyperreconfigurable architectures and the partition into hypercontexts problem
- Reconfigurable computing: Architectures, mod- els and algorithms
- Reconfigurable computing: a survey of systems and software
- Configuration compression for the Xilinx XC6200 FPGA
- System design for flexibility
- On metrics for comparing routability estimation methods for FPGAs
- Interconnect resource-aware placement for hierarchical FPGAs
- The Partition into Hypercontexts Problem for Hyperreconfigurable Architectures
- (Self-)reconfigurable finite state machines: theory and implementation
- Dynamic runtime re-scheduling allowing multiple implementations of a task for platform-based designs
- Configuration compression for the Xilinx XC6200 FPGA
- A Self-Reconfigurable Gate Array Architecture
- Efficient Self-Reconfigurable Implementations Using On-chip Memory
Cited by
- Cache Architectures for Reconfigurable Hardware
- On the design of two-level reconfigurable architectures
- Reliability and Availability in Reconfigurable Computing: A Basis for a Common Solution
- The Partition into Hypercontexts Problem for Hyperreconfigurable Architectures
- Models and Algorithms for Hyperreconfigurable Hardware
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