Design of a multi-channel high speed FIFO applied to HDLC processor based on PCI bus
Explore this paper's citation graph
- Type
- article
- Published
- 2002-06-29
- Cited by
- 6
- References
- 1
- OpenAlex
- https://openalex.org/W2533984654
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:63115173
Keywords
FIFO (computing and electronics), Computer science, PCI configuration space, Field-programmable gate array, Embedded system
References
No references recorded for this paper.
Cited by
- Modelling and simulation of wireless sensor system for health monitoring using HDL and Simulinkw mixed environment
- Design of dynamic synchronous multi-channel data acquisition system for lung sound based on FPGA
- Advanced sensor gateway based on FPGA for wireless multimedia sensor networks
- Data Communication Using HDLC Protocol
- Wireless Sensor Monitoring System by using Field Programmable Gate Array(FPGA)
- Developing An Advanced Digital Control Laboratory With A System On A Programmable Chip (Sopc)
- AC 2008-2098: DEVELOPING AN ADVANCED DIGITAL CONTROL LABORATORY WITH A SYSTEM-ON-A-PROGRAMMABLE-CHIP (SOPC)
Related papers
- The Study of the PCI Bus Expansion Based on PCI Bridge Chip
- Design of PCI-E Bus Interface Based on PowerPC8640
- Design Based on PCI Interface Using PCI-A
- Extending Cabled PCI Express to Connect Devices with Independent PCI Domains
- The technology of PCI bus and its application in data transmission
- Cabled PCI express-a standard high-speed insterument interconnect
- Design and Implementation of an Alternate System Interconnect based on PCI Express
- Application Design and Study of PCI Bus