Designing, optimizing, and sustaining heterogeneous chip multiprocessors to systematically exploit dark silicon
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Summary
Designing, Optimizing, and Sustaining Heterogeneous Chip Multiprocessors to Systematically Exploit Dark Silicon and finding ways to systematically exploit Dark Silicon is studied.
- Type
- article
- Published
- 2013-01-01
- Cited by
- 1
- References
- 46
- OpenAlex
- https://openalex.org/W118197767
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:9415771
Keywords
Exploit, Computer science, Chip, Silicon chip, Parallel computing
References
- Dark Silicon is Sub-Optimal and Avoidable
- PGCapping: Exploiting power gating for power capping and core lifetime balancing in CMPs
- The BubbleWrap many-core: Popping cores for sequential acceleration
- Lighting the dark silicon by exploiting heterogeneity on future processors
- NBTI-aware power gating for concurrent leakage and aging optimization
- GreenDroid: An architecture for the Dark Silicon Age
- Is dark silicon useful? Harnessing the four horsemen of the coming dark silicon apocalypse
- Dark silicon and the end of multicore scaling
- Long term sustainability of differentially reliable systems in the dark silicon era
- AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture
- Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing
- Optimizing total power of many-core processors considering voltage scaling limit and process variations
- The Exascale challenge
- Topologically homogeneous power-performance heterogeneous multicore systems
- Toward Dark Silicon in Servers
- Dark Silicon Aware Multicore Systems: Employing Design Automation With Architectural Insight
- Designing for dark silicon: a methodological perspective on energy efficient systems
- Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor
- Designing a processor from the ground up to allow voltage/reliability tradeoffs
- Computation spreading: employing hardware migration to specialize CMP cores on-the-fly
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