Design of Complex Rapid Single-Flux-Quantum Cells with Application to Logic Synthesis

Keywords

Rapid single flux quantum, Logic gate, Multiplexer, Logic synthesis, Logic optimization

References

• Automatic Single-Flux-Quantum (SFQ) Logic Synthesis Method for Top-Down Circuit DesignYoshio Kameda, Shinichi Yorozu, Yoshihito Hashimoto — 2006
• A single flux quantum standard logic cell libraryShinichi Yorozu, Yusuke Kameda, Hirotaka Terai — 2002
• Margins and yield in single flux quantum logicC.A. Hamilton, K.C. Gilbert — 1991
• RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systemsK. K. Likharev, В.К. Семенов — 1991
• A Josephson integrated circuit simulator (JSIM) for superconductive electronics applicationEmerson S. Fang — 1989
• Why is CMOS scaling coming to an END?Nor Zaidi Haron, Said Hamdioui — 2008

Cited by

• Superconducting Magnetic Field Programmable Gate ArrayNaveen Kumar Katam, Oleg A. Mukhanov, Massoud Pedram — 2018
• SFQmap: A Technology Mapping Tool for Single Flux Quantum Logic CircuitsGhasem Pasandi, Alireza Shafaei, Massoud Pedram — 2018
• A Graph Partitioning Algorithm with Application in Synthesizing Single Flux Quantum Logic CircuitsGhasem Pasandi, Massoud Pedram — 2018
• PBMap: A Path Balancing Technology Mapping Algorithm for Single Flux Quantum Logic CircuitsGhasem Pasandi, Massoud Pedram — 2018
• Toward Increasing the Difficulty of Reverse Engineering of RSFQ CircuitsHarshit Kumar, Tahereh Jabbari, Gleb Krylov — 2020
• Challenges and the status of superconducting single flux quantum technologyNaveen Kumar Katam, Jamil Kawa, Massoud Pedram — 2019
• Optimizing (HC)^2 LC, A Robust Clock Distribution Network For SFQ CircuitsRamy N. Tadros, Peter A. Beerel — 2020
• An Efficient Pipelined Architecture for Superconducting Single Flux Quantum Logic Circuits Utilizing Dual ClocksGhasem Pasandi, Massoud Pedram — 2020
• A Dynamic Programming-Based, Path Balancing Technology Mapping Algorithm Targeting Area MinimizationGhasem Pasandi, Massoud Pedram — 2019
• Design of an SFQ Full Adder as a Single-Stage GateHaolin Cong, Naveen Kumar Katam, Massoud Pedram — 2019
• Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic CircuitsRongliang Fu, Zhimin Zhang, Guang-Ming Tang — 2020
• Depth-bounded Graph Partitioning Algorithm and Dual Clocking Method for Realization of Superconducting SFQ CircuitsGhasem Pasandi, Massoud Pedram — 2020
• qMC: A Formal Model Checking Verification Framework For Superconducting LogicMustafa Munir, Aswin Gopikanna, Arash Fayyazi — 2021
• A survey on superconducting computing technology: circuits, architectures and design toolsJunying Huang, Rongliang Fu, Xiaochun Ye — 2022
• A Majority Logic Synthesis Framework For Single Flux Quantum CircuitsJunyao Zhang, Paul Bogdan, Shahin Nazarian — 2023
• Depth-optimal Buffer and Splitter Insertion and Optimization in AQFP CircuitsAlessandro Tempia Calvino, Giovanni De Micheli — 2023
• Formal Verification of Sequential Circuits in Superconducting Single Flux Quantum TechnologiesArash Fayyazi, Mustafa Munir, Sumukh Athrey — 2023
• A Combinational Logic Optimization Method for Large-Scale SFQ CircuitsQun Lin, Shucheng Yang, Bicong Weng — 2024

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