Partitioning routing area into zones with distinct pins
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- Type
- article
- Published
- 2001-01-03
- Cited by
- 1
- References
- 11
- OpenAlex
- https://openalex.org/W2132447145
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:41694408
Keywords
Routing (electronic design automation), Computer science, Boundary (topology), Heuristic, Topology (electrical circuits)
References
- Topological routing amidst polygonal obstacles
- Area(number)-balanced hierarchy of staircase channels with minimum crossing nets
- Recent directions in netlist partitioning: a survey
- Algorithms for VLSI Physical Design Automation
- Circuit clustering using graph coloring
- GALLO: a genetic algorithm for floorplan area optimization
- A Parallel Bottom-up Clustering Algorithm with Applications to Circuit Partitioning in VLSI Design
- Optimal aspect ratios of building blocks in VLSI
- Algorithms for VLSI Physical Design Automation
- Recent developments in netlist partitioning: a survey
- Computers and In stractability: A Guide to the Theory of NP-Completeness. W. H Freeman, San Fran
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