Supporting Timing Analysis by Automatic Bounding of Loop Iterations
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Summary
Three complementary methods to support timing analysis by bounding the number of loop iterations are described and have been successfully integrated in an existing timing analyzer that predicts the performance for optimized code on a machine that exploits caching and pipelining.
- Type
- article
- Published
- 2000-05-01
- Cited by
- 141
- References
- 36
- OpenAlex
- https://openalex.org/W1797762004
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:2858536
Keywords
Bounding overwatch, Computer science, Algorithm, Loop (graph theory), Code (set theory)
References
- Software pipelining: an effective scheduling technique for VLIW machines
- Symbolic Evaluation of Sums for Parallelising Compilers
- Compilers: Principles, Techniques, and Tools
- Computer architecture (2nd ed.): a quantitative approach
- Maple V Library Reference Manual
- Computer Architecture: A Quantitative Approach
- On the Quest for Perfect Load Balance in Loop-Based Parallel Computations
- A portable global optimizer and linker
- High-performance computer architecture (2nd ed.)
- Calculating the maximum execution time of real-time programs
- Experiments with a program timing tool based on source-level timing schema
- CTADEL: a generator of multi-platform high performance codes for PDE-based scientific applications
- Combining static worst-case timing analysis and program proof
- High performance compilers for parallel computing
- Real-Time Euclid: A language for reliable real-time systems
- Tighter timing predictions by automatic detection and exploitation of value-dependent constraints
- Integrating the timing analysis of pipelining and instruction caching
- Timing analysis for data caches and set-associative caches
- Efficient microarchitecture modeling and path analysis for real-time software
- Bounding worst-case instruction cache performance
Cited by
- Techniques for Building Timing-Predictable Embedded Systems
- Control-flow refinement and progress invariants for symbolic complexity bounds
- Exploiting hardware/software interactions for analyzing embedded systems
- Organizing Information for Execution Time Analysis in Real-Time Embedded Systems
- Tight Timing Estimation With the Newton-Gregory Formulae∗
- Behavioral Intervals in Embedded Software
- Contributions à l'analyse du comportement temporel de la hiérarchie mémoire pour l'estimation du pire temps d'exécution
- Cache and Compiler Interaction : How to analyze, optimize and time cache behavior
- Worst-Case Execution Time Analysis of Parallel Systems
- TuBound - A Conceptually New Tool for Worst-Case Execution Time Analysis
- Combining Symbolic Execution and Path Enumeration in Worst-Case Execution Time Analysis
- A Modular Tool Architecture for Worst-Case Execution Time Analysis
- Comparing WCET and Resource Demands of Trigonometric Functions Implemented as Iterative Calculations vs. Table-Lookup
- Loop Bound Analysis based on a Combination of Program Slicing, Abstract Interpretation, and Invariant Analysis
- Hybrid Cache Analysis in Running Time Verification of Embedded Software
- Cache persistence analysis for embedded real-time systems
- A WCET Analysis Method for Pipelined Microprocessors with Cache Memories
- Integer Range Analysis for Whiley on Embedded Systems
- Execution-Time Analysis for Embedded Real-Time Systems
- Computing time as a program variable: a way around infeasible paths
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