LDPC Coding for Magnetic Storage: Low Floor Decoding Algorithms, System Design and Performance Analysis
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Summary
This dissertation develops three classes of decoding algorithms for mitigating the error floor by directly tackling the cause of the problem: trapping sets, and extends to partial response channels algorithms for predicting the error rate performance in the floor region for the binary-input AWGN channel.
- Type
- article
- Published
- 2008-01-01
- Cited by
- 5
- References
- 84
- OpenAlex
- https://openalex.org/W94395346
- Semantic Scholar
- https://api.semanticscholar.org/CorpusID:39570646
Keywords
Low-density parity-check code, Computer science, Algorithm, Decoding methods, List decoding
References
- Codes and Decoding on General Graphs
- Low-Density Parity-Check (LDPC) Codes Constructed from Protographs
- On Quasi-Cyclic Repeat-Accumulate Codes
- Error Floors of LDPC Codes
- Multi-Edge Type LDPC Codes
- A performance improvement and error floor avoidance technique for belief propagation decoding of LDPC codes
- Protograph based low error floor LDPC coded modulation
- Algorithmic and combinatorial analysis of trapping sets in structured LDPC codes
- Codes for mass data storage systems
- The Theory of Error-Correcting Codes
- A General Method for Finding Low Error Rates of LDPC Codes
- Codes and iterative decoding on general graphs
- Construction of irregular LDPC codes with low error floors
- Concatenating a Structured LDPC Code and An RLL Code to Preserve Soft-Decoding, Structure, and Burst Correction
- Weaknesses of Margulis and Ramanujan-Margulis low-density parity-check cCodes
- Accumulate-Repeat-Accumulate Codes
- Optimal decoding of linear codes for minimizing symbol error rate (Corresp.)
- Explicit constructions of graphs without short cycles and low density codes
- Discrete-time modeling of transition noise dominant channels and study of detection performance
- Optimal code rates for the Lorentzian channel: Shannon codes and LDPC codes
Cited by
- Low-Floor Detection/Decoding of LDPC-Coded Partial Response Channels
- MDS Product Code Performance Estimations Under Header CRC Check Failures and Missing Syncs
- Reducing the complexity of equalisation and decoding of shingled writing
- On Coding and Detection Techniques for Two-Dimensional Magnetic Recording
- FPGA Design for Decoder of Projective Geometry ( PG )-based Low Density Parity Check ( LDPC ) Codes
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